FD.io VPP  v20.05-21-gb1500e9ff
Vector Packet Processing
pci.h
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1 /*
2  * Copyright (c) 2018 Cisco and/or its affiliates.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at:
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef __included_virtio_pci_h__
17 #define __included_virtio_pci_h__
18 
19 /* VirtIO ABI version, this must match exactly. */
20 #define VIRTIO_PCI_ABI_VERSION 0
21 
22 /*
23  * VirtIO Header, located in BAR 0.
24  */
25 #define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO) */
26 #define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */
27 #define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */
28 #define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */
29 #define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */
30 #define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */
31 #define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */
32 #define VIRTIO_PCI_ISR 19 /* interrupt status register, reading
33  * also clears the register (8, RO) */
34 /* Only if MSIX is enabled: */
35 #define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */
36 #define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications
37  (16, RW) */
38 
39 /*
40  * Vector value used to disable MSI for queue.
41  * define in include/linux/virtio_pci.h
42  * #define VIRTIO_MSI_NO_VECTOR 0xFFFF
43  */
44 
45 /* The bit of the ISR which indicates a device has an interrupt. */
46 #define VIRTIO_PCI_ISR_INTR 0x1
47 /* The bit of the ISR which indicates a device configuration change. */
48 #define VIRTIO_PCI_ISR_CONFIG 0x2
49 
50 /* VirtIO device IDs. */
51 #define VIRTIO_ID_NETWORK 0x01
52 
53 /* Status byte for guest to report progress. */
54 #define foreach_virtio_config_status_flags \
55  _ (VIRTIO_CONFIG_STATUS_RESET, 0x00) \
56  _ (VIRTIO_CONFIG_STATUS_ACK, 0x01) \
57  _ (VIRTIO_CONFIG_STATUS_DRIVER, 0x02) \
58  _ (VIRTIO_CONFIG_STATUS_DRIVER_OK, 0x04) \
59  _ (VIRTIO_CONFIG_STATUS_FEATURES_OK, 0x08) \
60  _ (VIRTIO_CONFIG_STATUS_DEVICE_NEEDS_RESET, 0x40) \
61  _ (VIRTIO_CONFIG_STATUS_FAILED, 0x80)
62 
63 typedef enum
64 {
65 #define _(a, b) a = b,
67 #undef _
69 
70 #define foreach_virtio_net_feature_flags \
71  _ (VIRTIO_NET_F_CSUM, 0) /* Host handles pkts w/ partial csum */ \
72  _ (VIRTIO_NET_F_GUEST_CSUM, 1) /* Guest handles pkts w/ partial csum */ \
73  _ (VIRTIO_NET_F_CTRL_GUEST_OFFLOADS, 2) /* Dynamic offload configuration. */ \
74  _ (VIRTIO_NET_F_MTU, 3) /* Initial MTU advice. */ \
75  _ (VIRTIO_NET_F_MAC, 5) /* Host has given MAC address. */ \
76  _ (VIRTIO_NET_F_GSO, 6) /* Host handles pkts w/ any GSO. */ \
77  _ (VIRTIO_NET_F_GUEST_TSO4, 7) /* Guest can handle TSOv4 in. */ \
78  _ (VIRTIO_NET_F_GUEST_TSO6, 8) /* Guest can handle TSOv6 in. */ \
79  _ (VIRTIO_NET_F_GUEST_ECN, 9) /* Guest can handle TSO[6] w/ ECN in. */ \
80  _ (VIRTIO_NET_F_GUEST_UFO, 10) /* Guest can handle UFO in. */ \
81  _ (VIRTIO_NET_F_HOST_TSO4, 11) /* Host can handle TSOv4 in. */ \
82  _ (VIRTIO_NET_F_HOST_TSO6, 12) /* Host can handle TSOv6 in. */ \
83  _ (VIRTIO_NET_F_HOST_ECN, 13) /* Host can handle TSO[6] w/ ECN in. */ \
84  _ (VIRTIO_NET_F_HOST_UFO, 14) /* Host can handle UFO in. */ \
85  _ (VIRTIO_NET_F_MRG_RXBUF, 15) /* Host can merge receive buffers. */ \
86  _ (VIRTIO_NET_F_STATUS, 16) /* virtio_net_config.status available */ \
87  _ (VIRTIO_NET_F_CTRL_VQ, 17) /* Control channel available */ \
88  _ (VIRTIO_NET_F_CTRL_RX, 18) /* Control channel RX mode support */ \
89  _ (VIRTIO_NET_F_CTRL_VLAN, 19) /* Control channel VLAN filtering */ \
90  _ (VIRTIO_NET_F_CTRL_RX_EXTRA, 20) /* Extra RX mode control support */ \
91  _ (VIRTIO_NET_F_GUEST_ANNOUNCE, 21) /* Guest can announce device on the network */ \
92  _ (VIRTIO_NET_F_MQ, 22) /* Device supports Receive Flow Steering */ \
93  _ (VIRTIO_NET_F_CTRL_MAC_ADDR, 23) /* Set MAC address */ \
94  _ (VIRTIO_F_NOTIFY_ON_EMPTY, 24) \
95  _ (VHOST_F_LOG_ALL, 26) /* Log all write descriptors */ \
96  _ (VIRTIO_F_ANY_LAYOUT, 27) /* Can the device handle any descripor layout */ \
97  _ (VIRTIO_RING_F_INDIRECT_DESC, 28) /* Support indirect buffer descriptors */ \
98  _ (VIRTIO_RING_F_EVENT_IDX, 29) /* The Guest publishes the used index for which it expects an interrupt \
99  * at the end of the avail ring. Host should ignore the avail->flags field. */ \
100 /* The Host publishes the avail index for which it expects a kick \
101  * at the end of the used ring. Guest should ignore the used->flags field. */ \
102  _ (VHOST_USER_F_PROTOCOL_FEATURES, 30)
103 
104 #define VIRTIO_NET_F_CTRL_GUEST_OFFLOADS 2
105 #define VIRTIO_NET_F_MTU 3
106 #define VIRTIO_NET_S_LINK_UP 1 /* Link is up */
107 #define VIRTIO_NET_S_ANNOUNCE 2 /* Announcement is needed */
108 
109 /*
110  * Control network offloads
111  * Reconfigures the network offloads that Guest can handle.
112  * Available with the VIRTIO_NET_F_CTRL_GUEST_OFFLOADS feature bit.
113  * Command data format matches the feature bit mask exactly.
114  * See VIRTIO_NET_F_GUEST_* for the list of offloads
115  * that can be enabled/disabled.
116  */
117 #define VIRTIO_NET_CTRL_GUEST_OFFLOADS 5
118 #define VIRTIO_NET_CTRL_GUEST_OFFLOADS_SET 0
119 
120 /* Common configuration */
121 #define VIRTIO_PCI_CAP_COMMON_CFG 1
122 /* Notifications */
123 #define VIRTIO_PCI_CAP_NOTIFY_CFG 2
124 /* ISR Status */
125 #define VIRTIO_PCI_CAP_ISR_CFG 3
126 /* Device specific configuration */
127 #define VIRTIO_PCI_CAP_DEVICE_CFG 4
128 /* PCI configuration access */
129 #define VIRTIO_PCI_CAP_PCI_CFG 5
130 
131 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
132 
133 #define VIRTIO_PCI_VRING_ALIGN 4096
134 
135 typedef enum
136 {
141 
142 /* This is the PCI capability header: */
143 typedef struct
144 {
145  u8 cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
146  u8 cap_next; /* Generic PCI field: next ptr. */
147  u8 cap_len; /* Generic PCI field: capability length */
148  u8 cfg_type; /* Identifies the structure. */
149  u8 bar; /* Where to find it. */
150  u8 padding[3]; /* Pad to full dword. */
151  u32 offset; /* Offset within bar. */
152  u32 length; /* Length of the structure, in bytes. */
154 
155 typedef struct
156 {
157  struct virtio_pci_cap cap;
158  u32 notify_off_multiplier; /* Multiplier for queue_notify_off. */
160 
161 /* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
162 typedef struct
163 {
164  /* About the whole device. */
165  u32 device_feature_select; /* read-write */
166  u32 device_feature; /* read-only */
167  u32 guest_feature_select; /* read-write */
168  u32 guest_feature; /* read-write */
169  u16 msix_config; /* read-write */
170  u16 num_queues; /* read-only */
171  u8 device_status; /* read-write */
172  u8 config_generation; /* read-only */
173 
174  /* About a specific virtqueue. */
175  u16 queue_select; /* read-write */
176  u16 queue_size; /* read-write, power of 2. */
177  u16 queue_msix_vector; /* read-write */
178  u16 queue_enable; /* read-write */
179  u16 queue_notify_off; /* read-only */
180  u32 queue_desc_lo; /* read-write */
181  u32 queue_desc_hi; /* read-write */
182  u32 queue_avail_lo; /* read-write */
183  u32 queue_avail_hi; /* read-write */
184  u32 queue_used_lo; /* read-write */
185  u32 queue_used_hi; /* read-write */
187 
188 typedef struct
189 {
194 } vring_desc_t;
195 
196 typedef struct
197 {
200  u16 ring[0];
201  /* u16 used_event; */
202 } vring_avail_t;
203 
204 typedef struct
205 {
209 
210 typedef struct
211 {
215  /* u16 avail_event; */
216 } vring_used_t;
217 
218 typedef struct
219 {
221  /* return */
231 
232 extern void debug_device_config_space (vlib_main_t * vm, virtio_if_t * vif);
233 extern void device_status (vlib_main_t * vm, virtio_if_t * vif);
238  int gso_enabled,
239  int checksum_offload_enabled,
240  int offloads_disabled);
241 #endif /* __included_virtio_pci_h__ */
242 /*
243  * fd.io coding-style-patch-verification: ON
244  *
245  * Local Variables:
246  * eval: (c-set-style "gnu")
247  * End:
248  */
u32 len
Definition: pci.h:191
int virtio_pci_enable_disable_offloads(vlib_main_t *vm, virtio_if_t *vif, int gso_enabled, int checksum_offload_enabled, int offloads_disabled)
Definition: pci.c:1507
unsigned long u64
Definition: types.h:89
u16 next
Definition: pci.h:193
int virtio_pci_delete_if(vlib_main_t *vm, virtio_if_t *ad)
Definition: pci.c:1420
u16 idx
Definition: pci.h:199
u16 flags
Definition: pci.h:212
void device_status(vlib_main_t *vm, virtio_if_t *vif)
Definition: pci.c:379
unsigned char u8
Definition: types.h:56
u32 notify_off_multiplier
Definition: pci.h:158
u32 offset
Definition: pci.h:151
u64 addr
Definition: pci.h:190
#define foreach_virtio_config_status_flags
Definition: pci.h:54
unsigned int u32
Definition: types.h:88
u32 padding
Definition: vhost_user.h:151
unsigned short u16
Definition: types.h:57
vlib_main_t * vm
Definition: in2out_ed.c:1599
u32 length
Definition: pci.h:152
virtio_config_status_flags_t
Definition: pci.h:63
u16 flags
Definition: pci.h:198
signed int i32
Definition: types.h:77
void debug_device_config_space(vlib_main_t *vm, virtio_if_t *vif)
Definition: pci.c:407
clib_error_t * error
Definition: pci.h:229
u32 device_feature_select
Definition: pci.h:165
u32 guest_feature_select
Definition: pci.h:167
vl_api_mac_address_t mac_addr
Definition: l2.api:180
u16 idx
Definition: pci.h:213
u16 flags
Definition: pci.h:192
virtio_msix_status_t
Definition: pci.h:135
void virtio_pci_create_if(vlib_main_t *vm, virtio_pci_create_if_args_t *args)
Definition: pci.c:1234