2.5.9. Container Orchestrated Topologies

Following sections include Throughput Speedup Analysis for VPP multi- core multi-thread configurations with no Hyper-Threading, specifically for tested 2t2c (2threads, 2cores) and 4t4c scenarios. 1t1c throughput results are used as a reference for reported speedup ratio. Performance is reported for VPP running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement.

2.5.9.1. NDR Throughput

VPP NDR 64B packet throughput speedup ratio is presented in the graphs below for 10ge2p1x520 and 10ge2p1x710 network interface cards.

2.5.9.1.1. NIC 10ge2p1x520

Figure 1. VPP 1thread 1core - NDR Throughput for Phy-to-Phy L2 Ethernet Switching (base).

CSIT source code for the test cases used for above plots can be found in CSIT git repository.

2.5.9.1.2. NIC 10ge2p1x710

Figure 2. VPP 1thread 1core - NDR Throughput for Phy-to-Phy L2 Ethernet Switching (base).

CSIT source code for the test cases used for above plots can be found in CSIT git repository.

2.5.9.2. PDR Throughput

VPP PDR 64B packet throughput speedup ratio is presented in the graphs below for 10ge2p1x520 and 10ge2p1x710 network interface cards.

2.5.9.2.1. NIC 10ge2p1x520

Figure 3. VPP 1thread 1core - NDR Throughput for Phy-to-Phy L2 Ethernet Switching (base).

CSIT source code for the test cases used for above plots can be found in CSIT git repository.

2.5.9.2.2. NIC 10ge2p1x710

Figure 4. VPP 1thread 1core - NDR Throughput for Phy-to-Phy L2 Ethernet Switching (base).

CSIT source code for the test cases used for above plots can be found in CSIT git repository.